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	<title>Comments on: 10G and Direct Cache Access</title>
	<atom:link href="http://daniel.haxx.se/blog/2008/12/18/10g-and-direct-cache-access/feed/" rel="self" type="application/rss+xml" />
	<link>http://daniel.haxx.se/blog/2008/12/18/10g-and-direct-cache-access/</link>
	<description>Technology is life</description>
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		<title>By: bgoglin</title>
		<link>http://daniel.haxx.se/blog/2008/12/18/10g-and-direct-cache-access/comment-page-1/#comment-1128</link>
		<dc:creator>bgoglin</dc:creator>
		<pubDate>Wed, 11 Mar 2009 17:51:30 +0000</pubDate>
		<guid isPermaLink="false">http://daniel.haxx.se/blog/?p=488#comment-1128</guid>
		<description>Please send me a email at my above login _at_ free.fr, I&#039;ll send you some details and code.</description>
		<content:encoded><![CDATA[<p>Please send me a email at my above login _at_ free.fr, I&#8217;ll send you some details and code.</p>
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		<title>By: dlanthier72</title>
		<link>http://daniel.haxx.se/blog/2008/12/18/10g-and-direct-cache-access/comment-page-1/#comment-1125</link>
		<dc:creator>dlanthier72</dc:creator>
		<pubDate>Tue, 10 Mar 2009 17:03:45 +0000</pubDate>
		<guid isPermaLink="false">http://daniel.haxx.se/blog/?p=488#comment-1125</guid>
		<description>I have the same problem with a PowerEdge 1950 !

How can we enable the DCA modifying the chipset registers manually ?

Thanks !

Dominique

P.S. Please bgoglin respond ...</description>
		<content:encoded><![CDATA[<p>I have the same problem with a PowerEdge 1950 !</p>
<p>How can we enable the DCA modifying the chipset registers manually ?</p>
<p>Thanks !</p>
<p>Dominique</p>
<p>P.S. Please bgoglin respond &#8230;</p>
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		<title>By: Dawid</title>
		<link>http://daniel.haxx.se/blog/2008/12/18/10g-and-direct-cache-access/comment-page-1/#comment-1124</link>
		<dc:creator>Dawid</dc:creator>
		<pubDate>Mon, 09 Mar 2009 18:17:22 +0000</pubDate>
		<guid isPermaLink="false">http://daniel.haxx.se/blog/?p=488#comment-1124</guid>
		<description>Hi,

I&#039;d also appreciate info about enabling DCA, &#039;cause just by:
1. enabling I/OAT DMA Engine in DELL PowerEdge 2950 BIOS
2. installing appropriate drivers for Intel 5000 Series Chipset Integrated Device - 1A38 (http://downloadcenter.intel.com/detail_desc.aspx?agr=Y&amp;DwnldID=12193)

it seems to work. But regarding to page 4 of Intel Processor-based Server Selection Guide (http://download.intel.com/products/processor/xeon/ssguide.pdf) the enhanced features like Direct Cache Access (DCA) apply only to Xeon 7400 Series.

So, I&#039;m little bit lost here. How can I be sure that the server is actually using I/OAT or DCA with PCI-E Intel PRO/1000 PT Dual Port Server Adapter (http://support.intel.com/support/network/adapter/1000ptdual)?
Can you help me?

Thanx in advance</description>
		<content:encoded><![CDATA[<p>Hi,</p>
<p>I&#8217;d also appreciate info about enabling DCA, &#8217;cause just by:<br />
1. enabling I/OAT DMA Engine in DELL PowerEdge 2950 BIOS<br />
2. installing appropriate drivers for Intel 5000 Series Chipset Integrated Device &#8211; 1A38 (<a href="http://downloadcenter.intel.com/detail_desc.aspx?agr=Y&amp;DwnldID=12193" rel="nofollow">http://downloadcenter.intel.com/detail_desc.aspx?agr=Y&amp;DwnldID=12193</a>)</p>
<p>it seems to work. But regarding to page 4 of Intel Processor-based Server Selection Guide (<a href="http://download.intel.com/products/processor/xeon/ssguide.pdf" rel="nofollow">http://download.intel.com/products/processor/xeon/ssguide.pdf</a>) the enhanced features like Direct Cache Access (DCA) apply only to Xeon 7400 Series.</p>
<p>So, I&#8217;m little bit lost here. How can I be sure that the server is actually using I/OAT or DCA with PCI-E Intel PRO/1000 PT Dual Port Server Adapter (<a href="http://support.intel.com/support/network/adapter/1000ptdual)?" rel="nofollow">http://support.intel.com/support/network/adapter/1000ptdual)?</a><br />
Can you help me?</p>
<p>Thanx in advance</p>
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	<item>
		<title>By: sakamura</title>
		<link>http://daniel.haxx.se/blog/2008/12/18/10g-and-direct-cache-access/comment-page-1/#comment-1093</link>
		<dc:creator>sakamura</dc:creator>
		<pubDate>Tue, 27 Jan 2009 18:41:34 +0000</pubDate>
		<guid isPermaLink="false">http://daniel.haxx.se/blog/?p=488#comment-1093</guid>
		<description>Quick question, if possible. I have searched, but could not find any information on how to modify these chipset registers to enable DCA. I got the exact same problem, and am running Linux. Any starting point to do this task?</description>
		<content:encoded><![CDATA[<p>Quick question, if possible. I have searched, but could not find any information on how to modify these chipset registers to enable DCA. I got the exact same problem, and am running Linux. Any starting point to do this task?</p>
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	<item>
		<title>By: daniel</title>
		<link>http://daniel.haxx.se/blog/2008/12/18/10g-and-direct-cache-access/comment-page-1/#comment-1064</link>
		<dc:creator>daniel</dc:creator>
		<pubDate>Fri, 19 Dec 2008 09:16:24 +0000</pubDate>
		<guid isPermaLink="false">http://daniel.haxx.se/blog/?p=488#comment-1064</guid>
		<description>Many thanks for these additional details/corrections, I&#039;ll see if I can take advantage of this...</description>
		<content:encoded><![CDATA[<p>Many thanks for these additional details/corrections, I&#8217;ll see if I can take advantage of this&#8230;</p>
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	<item>
		<title>By: bgoglin</title>
		<link>http://daniel.haxx.se/blog/2008/12/18/10g-and-direct-cache-access/comment-page-1/#comment-1063</link>
		<dc:creator>bgoglin</dc:creator>
		<pubDate>Fri, 19 Dec 2008 06:50:50 +0000</pubDate>
		<guid isPermaLink="false">http://daniel.haxx.se/blog/?p=488#comment-1063</guid>
		<description>DCA doesn&#039;t really reduce the memory bandwidth requirements since the data still has to be fetched by the cache from the main memory (the device doesn&#039;t write into the cache, it just tells the cache that data should be fetched). The whole point of the approach is that this fetch is done in advance, so you don&#039;t have to wait for it when the host starts processing the packet.

DCA is at least also supported on Xeon 53400 and 5400 based hosts with Intel 5000 chipset. I actually think most/all modern Xeon hosts support I/OAT including DCA. So if you can get the DMA engine in lspci, you should get DCA as well.

However it is not always enabled in the BIOS. For instance, on all models of Dell Poweredge 2950 that we have, all I/OAT features are disabled by default. You have to enter the BIOS to enable I/OAT DMA engine, but you can&#039;t even enable DCA from there. So you end up modifying the chipset registers manually to enable DCA. It works then, but it is annoying.</description>
		<content:encoded><![CDATA[<p>DCA doesn&#8217;t really reduce the memory bandwidth requirements since the data still has to be fetched by the cache from the main memory (the device doesn&#8217;t write into the cache, it just tells the cache that data should be fetched). The whole point of the approach is that this fetch is done in advance, so you don&#8217;t have to wait for it when the host starts processing the packet.</p>
<p>DCA is at least also supported on Xeon 53400 and 5400 based hosts with Intel 5000 chipset. I actually think most/all modern Xeon hosts support I/OAT including DCA. So if you can get the DMA engine in lspci, you should get DCA as well.</p>
<p>However it is not always enabled in the BIOS. For instance, on all models of Dell Poweredge 2950 that we have, all I/OAT features are disabled by default. You have to enter the BIOS to enable I/OAT DMA engine, but you can&#8217;t even enable DCA from there. So you end up modifying the chipset registers manually to enable DCA. It works then, but it is annoying.</p>
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